1. Technical Field
Several aspects of the present invention relate to a semiconductor device and a manufacturing method thereof, and more particularly to a technique that reduces a degree of dishing in a silicon-on-insulator (SOI) forming region in a semiconductor device manufactured by a Separation by Bonding Si Islands (SBSI) method.
2. Related Art
The development of a technique of forming a device in a semiconductor film on an insulating film substrate such as a Silicon-On Insulator (SOI) has been actively taken place in a recent semiconductor field. Particularly, a device formed on a SOI substrate has potential for low power consumption and high-speed and low voltage driving.
Various methods for manufacturing such SOI substrate have been known. The methods include a Separation by Implanted Oxygen (SIMOX) method, bonding methods such that two silicon substrates are adhered together with an oxide film interposed therebetween and the like. These methods require special processes or equipment and the SOI substrate could not be manufactured through an ordinary Complementary Metal-Oxide Semiconductor (CMOS) process according to the above-mentioned methods. Under such circumstances, a method for manufacturing the SOI substrate only through the ordinary CMOS process has been attracted attention recently. T. Sakai et al., Second International SiGe Technology and Device Meeting, Meeting abstract, pp. 230-231, May, 2004 is an example of related art. A Separation by Bonding Silicon Island (SBSI) method according to the example can form a SOI structure only by the ordinary COMS process.
According to the SBSI method disclosed in the example, a SOI structure was firstly formed on a Si substrate, followed by formation of a thick insulating film, and then the thick insulating film was treated by chemical mechanical polishing (CMP). In the CMP treatment, a poly-Si layer 92 (hereinafter referred “epi-polysilicon film”), which was formed on an isolation layer 93 as a by-product of the formation of the single-crystalline Si on the Si substrate by an epitaxial growth method, serves as a stopper for a polishing cloth (polishing pad).
However, according to the example of the related art, an arrangement and configuration of the epi-polysilicon film 92 were decided by an layout of element isolations in the integrated circuit, and the arrangement and configuration of the epi-polysilicon film 92 were not be designed considering its function as the stopper. Consequently, a phenomenon so-called “dishing” can occur at the time of the CMP treatment of the thick insulating film and the Si layer existing in a SOI forming region 91 could be unnecessarily polished if the area of the epi-polysilicon film 92 is too small or the distance L between two adjacent epi-polysilicon films 29 with the SOI forming region 91 therebetween as shown in FIG. 8 is too long.